Thin film resistors are employed in many integrated circuits. These resistors are used in integrated circuits to implement the desired functionality of circuits, including biasing of active devices, serving as voltage dividers, assisting in impedance matching, etc. They are typically formed by deposition of a resistive material on a dielectric layer, and subsequently patterned to a desired size and shape. Deposition of the resistive material can be performed by any deposition means, such as by sputtering. Often, a thin film resistor is subjected to a heat treatment process (i.e. annealing) to improve its stability and to bring the resistance to a desired value range.
Although annealing a thin film resistor may alter its resistance to a desired value range, to achieve a precise value for the resistance, laser trimming of the thin film resistor is employed. Laser trimming of a thin film resistor consists of directing a laser beam upon the thin film resistor which causes a change in the thin film material. The change in the thin film material, in turn, causes a corresponding change of its resistance. Accordingly, laser trimming allows precise control of setting the desired resistance for the thin film resistor.
Typically, it is desirable that laser trimming of thin film resistors be performed in a substantially efficient manner. The efficiency of laser trimming of thin film resistor depends on the thickness, among other factors, of the dielectric situated directly below and supporting the thin film resistor. That is, given a particular thin film resistor material, a wavelength of the laser used in trimming the thin film resistor, and a particular material for the dielectric situated directly below and supporting the thin film resistor, there is a particular thickness of such dielectric material which optimizes the efficiency of laser trimming the thin film resistor.
However, achieving a desired thickness for such dielectric material may be difficult. Often, thin film resistors are disposed on interlayer dielectrics (ILDs), which in turn, are disposed on irregular topology. Accordingly, the dielectric thickness below various thin film resistors formed on the ILD may vary substantially. In addition, often such dielectric layers are subjected to chemical mechanical polishing (CMP), spin on glass (SOG) etchback, or other planarization techniques. Such techniques typically preclude the ability of accurate thickness control of the dielectric supporting the thin film resistor.